Circuit breaker fault simulator

ABSTRACT

A relatively small, electrical device which provides voltage signals on two output lines thereof. The output lines are adapted to be connected by way of a suitable plug to a set of special input terminals on a molded case circuit breaker. The simulator is energized by standard 120 volt, 60 hz. power. The signals from the output terminals of the simulator are provided to the static trip circuit of the circuit breaker. The input connections are so arranged as not to interfere with the overload sensing devices of the circuit breaker being tested. Consequently, the circuit breaker need not be disconnected while testing. By moving a selector switch either a high level or low level signals may be applied from the simulator to the static trip circuit. The high level signal corresponds to an overload condition which would normally cause an instantaneous trip of the circuit breaker. This signal is timed or limited to be removed from the input of the trip circuit after a short period of time. This prevents the trip circuit from being damaged by the signal. Low level signals may be applied which simulates that kind of overload condition which would normally cause the circuit breaker to trip after a predetermined delay.

Maier et al.

[ Dec.3, 1974 1 1 CIRCUIT BREAKER FAULT SIMULATOR [75] Inventors: AlfredE. Maier, Beaver Falls; Alan B. Shimp, Monroeville, both of Pa.

[73] Assignee: Westinghouse Electric Corporation,

Pittsburgh, Pa.

[22] Filed: Sept. 28, 1973 21 Appl. No.: 401,932

Primary ExaminerAlt red' Smith Assistant Examiner-Rolf Hille Attorney,Agent, or Firm-M. .1. Moran; C. L. McHale s7 ABSTRACT A relativelysmall, electrical device which provides voltage signals on two outputlines thereof. The output lines are adapted to be connected by way of asuitable plug to a set of special input terminals on a molded casecircuit breaker. The simulator is energized by standard 120 volt, 60 hz.power. The signals from the output terminals of the simulator areprovided to the static trip circuit of the circuit breaker. The inputconnections are so arranged as not to interfere with the overloadsensing devices of the circuit breaker being tested. Consequently, thecircuit breaker need not be disconnected while testing. By moving aselector switch either a high level or low level signals may be appliedfrom the simulator to the static triprcircuit. The high level signalcorresponds to an overload condition which would normally cause aninstantaneous trip of the circuit breaker. This signal is timed orlimited to be removed from the input of the trip circuit after a shortperiod of time. This prevents the trip circuit from being damaged by thesignal. Low level signals may be applied which simulates that kind ofoverload condition which would normally cause the circuit breaker totrip after a predetermined delay.-

16 Claims, 4 Drawing Figures 7 PATENTEL 553 31974 sum 1- BF 2 CIRCUITBREAKER FAULT SIMULATOR CROSS REFERENCES TO RELATED APPLICATIONS No.327,973; and Alfred E. Maier. Ser. No. 327,972,

all of which are assigned to the same assignee as in the present caseand all of which were filed in the US. Patent Office on Jan. 30, 1973.

BACKGROUND OF THE INVENTION 1. Field of the Invention This inventionrelates generally to apparatus for testing circuit breakers, andspecifically, to apparatus and methods for testing molded case circuitbreaker trip circuits by simulating fault signals at the input to thetrip circuit.

v2. Description of the Prior Art In the past, circuit breakers have beentested periodically to insure that the solid state trip circuit thereinis functioning correctly by passing a high current through each breakerpole in order to simulate the fault at the source. However, there arecertain disadvantages with this operatiomOne disadvantage lies in thefact that the devices'for simulating faults at the circuit breaker poleare relatively large and expensive. Further, it is resimulated signalmay be provided to the trip circuit. In thecase of the high level fault,the trip circuit should trip almost instantaneously. In the case of thelow level fault, the trip circuit should trip after a predetermined timedelay which is related to the amount of overload. A feature of thesimulator which is associated with the high level signal is a timingmeans for causing the high levelsignal to be removed from the inputterminals of the trip circuit a relatively short time after it has beenimposed thereupon. The reason for this is to protect the trip circuitfrom high current stress over a prolonged period. In normal operation,when a high level fault is sensed by the trip circuit, it causes thecircuit breaker to trip almost instantaneously, thus removing the sourceof high level fault. The latter-mentioned feature of the simulatoraccomplished the same purpose.

BRIEF DESCRIPTION OF THE DRAWINGS tion; and

quired that the circuit breaker be disconnected from the'line it hadbeen protecting and reconnected to the device for providing thesimulated fault current at the pole of the circuit breakenThis isinconvenient, time consuming and presents a potential safety hazardsince a risk to personnel and equipment exists each time the poles ofacircuit breaker are connected or disconnected from a potentially hotelectrical conductor. It would be advantageous therefore to test thesolid state trip circuit of a circuit breaker without having tophysically manipulate the circuit'breaker or the conductors connectedthereto. It would also be advantageous to do this inexpensively andquickly with equipment of a relatively small volume and weight. SUMMARYOF THE INVENTION An improved means for testing circuit breakers of themolded case variety. Terminals are provided on the outer casing on thecircuit breaker to be tested so that test lines may be provided to thecircuit breaker. The circuitbreaker need not be disconnected orphysically moved from its location to test the solid state trip circuitcontained therein because the previously described terminals provide theneeded input terminals to the circuit breaker for accomplishing testing.A relatively small, lightweight fault simulator is provided which has aselector switch thereon and which can be energized by standard 120 volt60 hz electrical current. Two leads from the simulator are connected tothe previously described terminals of the circuit breaker. This connectsthe fault simulator to the trip circuit in series with the fault sensorsnormally associated with the trip circuit of the circuit breaker. Bypositioning one pole of a selector switch into either of two positions,either a relatively high level fault simulated signal may be pro videdto the trip circuit or a relatively low level fault FIG. 4 shows anelectric circuit diagram of a circuit interrupter system which is shownpartly in schematic form and partly in functional block diagramform.

. DESCRIPTION OF THE PREFERRED EMBODIMENT Referring now to the drawings,and FIG. 1 in particular, a front view of a molded case circuit breaker5 is shown. A detailed description of the constructionand operation ofcircuitlbreaker 5 is given in a copending of static circuit board 6 aretwo terminals .l and K.

' These terminals are provided for interconnecting the fault simulatorwhich is the subject matter of the invention with the static tripcircuitry of the circuit breaker 5. In the preferred embodiment of theinvention, terminals J and K are bayonet or male electrically conductingterminals recessed within cylindrical openings. In the preferredembodiment of the invention, the fault simulator which is the subject ofthis invention and whichv is to be described hereafter is adapted foruse primarily with circuit breaker 5. However, it is to be understoodthat the principles embodied in the teachings of the invention may beapplied to other circuit breakers and are notlimited to the circuitbreaker 5 shown in FIG. 1. I

Referring now to FIG. 2, one embodiment of the fault simulator isdepicted. The fault simulator is generally designated F. It comprises atransformer TA, having a primary winding T and a secondary winding S.The input terminals of the primary winding T may be connected to anyconventional source of power, such as,

but not limited to, 120 volts 6() hz alternating current as in thepreferred embodiment. The output terminals of the secondary winding Sare connected across a full wave bridge rectifier network DBA. One ofthe output terminals of the bridge DBA comprises system common and hasconnected thereto one terminal J of the two output terminals of thefault simulator F. The other output terminal of the bridge DBA isconnected to the pole of a switch S. Switch S has two contact positionsLD and SD. Contact position LD is connected to a resistive element RA,the other end of which is connected to an output terminal K, which isthe other of the two output terminals of the fault simulator F. The SDcontact of the switch S is connected to one end of a resistive elementRB and concurrently to one end of a resistive element RC. The other endof resistive element RC is connected to one end of capacitive element CAand one end of a relay coil CR1. The other ends of the capacitiveelements CA and CR1 .are connected to bridge common terminal J. Theother end of resistive element RB is connected to the normally closedcontacts KCRl of the relay represented by relay coil CR1. The other endof the normally closed contact KCRl is connected to the anode of a diodeDA, the cathode of which is connected to the previously mentionedterminal K. In operation, the primary winding T of the transformer TA isenergized by a suitable power source such as the previously mentioned120 volts 60 hz alternating current source. This energy is carriedthrough transformer TA to the secondary winding S thereof. From here itis rectified by the full wave bridge rectifier DBA. If the pole of theswitch S is in the LD position, the output current from the bridge DBAis supplied through resistive element RA to the K contact, from whenceit flows into a load which may be connected between the K contact andthe J contact, and from that load into the J contact and to a returnpath to the other end of the bridge rectifier network DBA. The resistiveelement RA may be used for calibration purposes to determine themagnitude of the current flowing into and out of the contacts K and J,respectively. lfthe pole of switch S is in the other or SD contactposition, portions of current from the positive output terminal of thebridge DBA flow concurrently through resistive elements RC and RB, theamount of current flowing through each being dependent upon the loads ofeach of the networks containing the two previously described elements.Electrical current will flow through resistive element RB, through thenormally closed contacts KCRl, through the diode DA, into the contact orterminal K. It will then circulate through an external load whichmay beconnected to the fault simulator F and thence into the terminal J andback to the bridge DBA. Concurrent with this, electrical current flowsthrough the resistive element RC to charge the capacitive element CA.The capaciti ve element will charge to a predetermined voltage valuewhich is dependent upon the magnitude of the current flowing through theresistive element RC. The time constant of the network includes theresistive element RC, the capacitive element CA, and the resistance andinductance of relay coil CR1. After a predetermined period of time,capacitive element CA will charge to a voltage value sufficient toenergize relay coil CR1 which will then cause normally closed relaycontacts KCRl to open. When the contacts KCRl open, that path includingthe resistive element RB,

diode DA and the load connected across the' terminals K, J isinterrupted, and consequently, no more current flows through the load.As a result, the SD setting or contact position for the switch S,represents a short delayed application of simulated fault current to anyload which may be connected between the terminals K and J. However, ifthe pole of switch S is in the LD contact position, current will flowthrough the previously described load until the pole of the switch S ismoved to another position, the load is disconnected or the inputterminals of the primary winding T of the transformer TA aredeenergized.

[n a primary embodiment of the invention, the terminals K, J match orare complementary to the terminals K, J shown in FIG. 1. In a preferredembodiment of the invention, terminals K, J are in a female plug whichis complementary to the recessed bayonet male contacts shown at K and Jin FIG. 1.

Referring now to FIG. 3, another embodiment of the invention is shown.In this embodiment of the invention, the capacitive timing circuit,including resistive element RC, capacitive element CA and relay coilCR1, is deleted, as the timing function is provided by other means. Inthis embodiment of the invention, a resistive element RD is connected tothe terminal SD. The other end of resistive element RD is connected to alamp LA. The other terminal of the lamp LA is connected to the anode ofa diode DD, the cathode of which is connected to the previouslydescribed output terminal K. In this embodiment of the invention, whenthe pole of the switch S is put in the SD contact position, current willflow through the resistive element RD and through the lamp LA and thediodes DD" and out of the terminal K in a manner similar to thatpreviously described with respect to FIG. 2.'As the element of the lampLA increases in temperature, theresistance thereof increasescorrespondingly. This increase of resistance causes an increase in theoverall resistance of the path, and thus, tends to limit the currentflowing therethrough. Although the current is not completely turned off,as with the opening of the contacts KCRl of FIG. 2, the current may besufflciently limited to prevent significant flow in any load which maybe connected between the terminals K and J shown in FIG. 2.

Referring now to FIG. 4, there is shown a schematic diagram of solidstate circuitry, which is more specifically described in detail in theabove-mentioned patent application of Alan B. Shimp, Ser. No. 327,973and also described in the previously described Ser. No. 327,972 to A. E.Maier, both of which are assigned to the assignee of the presentinvention. The schematic diagram is that of a circuit breaker system10', where the circuit breaker is designated CB2 and has therein atleast one set of separable main contacts which are adapted to open andclose to protect an electrical conductor. Conductors Ll through L3 areexamples of such a conductor. There is opening means operable foractuating the contacts to the open position. The opening means includesa trip coil TC2 having a movable plunger attached to a linkage 39 whichinterlinks and moves the separable main contacts XX, YY and 22 on thelines L1, L2 and L3, respectively. The later mentioned lines may beelectrical conductors for a threephase electrical system having phases1, 2, and 3, respectively, in which are flowing electrical currents ll,12, and I3, respectively. Interconnected with the opening means TC2 is atrip circuit, generally designated 13 in FIG. 4, it being understoodthat any trip circuit may be used provided it can actuate the openingmeans TC2 and may be energized by the means which will be describedhereinafter. In this'embodiment of the invention, the trip circuit 13'comprises a substantially entors CTI, CT2 and GT3 are N to 1 currenttransformers. However, it is to be understood that any convenientmonitoring means may be used provided it satisties the input conditionsof the bridge network. The output of the current transformer CT! isconnected to the input of afull wave bridge rectifier DB1; The output ofthe current transformer CT2 is connected to the input of a full wavebridge'rectifier DB2, and the output of the-currentutransformer CT3 isconnected to the input to a full wave bridge rectifier DB3. The outputterminals of the full wavebridge rectifiers DB1 through DB3 areinterconnected in series circuit relationship. Also connected in seriescircuit relationship therewith is a diode DN, on either sideof which areprovided the two previously described terminals J and K which are alsoshown in FIG. 1. It is at this convenient place that the'simulator Fshown in FIGS. 2 and 3 may be interconnected with the' solid state tripcircuitry 13' of FIG. 4 in a series circuit relationship. The diode DNrepresentsa diode connected in reversed-biased relationship across theoutputterminalsK", J of the previously described fault sensor F Thismeans that the positive terminal K and the negative terminal J areisolated by the reverse-biased diode DN. Current provided by the faultand is independent of currents I,,, I and 1 which are generated by theseries combination of the full wave bridge rectifiers DB1 through'DB3 inresponse to currents sensed in lines Ll through L3 respectively bycurrent transformers CTl, CT2, and CT3. This also means that the circuitbreaker portion CB2 which in the preferred embodiment may be a portionof circuit breaker 5 shown in FIG. 1 need not be disconnected fortesting.

The input terminals to the solid state trip circuit 13 are shown at A, Aand the output terminals are shown at 36' and 38'. It is across theselatter mentioned output terminals that the trip coil TC2 is connected.In normal operation, should a fault be sensed in any of the lines Llthrough L3, the following sequence of events willtake place. Thatcurrent transformer CTl through CT3 which senses or monitors a faultcurrent I1 through I3, respectively in any or all of the lines to beprotected will provide a current signal to its respective bridge networkDB1 through DB3. The current I1 is proportional to the magnitude of thelargest current in any of the' lines L1 through L3. This current is fedthrough to the solid state trip circuit 13' where it is determine atwhich point in time an output signal will be impressed across the outputterminals 3 6' and 38" to energize the trip coil TC2 to cause an openingof the separable main contacts XX, YY and ZZ to interrupt the flow ofcurrent in the lines or line to be protected. Normally, the testing ofthe circuit breaker system 10 would require disconnecting of the circuitbreaker CB2 and the subsequent generation of overload currents I1, l2and/or 13 in lines L1, L2 and L3 to generate the current I1 sufficientto cause the trip circuit 13' to actuate the trip coil TC2'to cause thedisconnected circuit breaker CB2 to be tested. According to theteachings of the preferred embodiment of the invention, however, theplacement of the fault simulator F at'the outshown flowing in lines l5and 16' of FIG. 4, which cur- I rent'is generated by the seriescombination of the full wave bridge rectifiers DB1 through DB3 inresponse to currents sensed in lines Ll through L3 respectively bycurrent transformers. These current transformers need not bedisconnected, nor the circuitry associated therewith rearranged forsimulating a fault in the solid state trip circuitry 13 once the diodeDN has been placed in the circuitry and the terminals J and K madeavailable.

' It is at this convenient place, terminals J and K, that the simulatorF shown in FIGS. 2 and 3 may be connected. During normal operation whenthe breaker is not being tested, the current I, into the solid statecircuit is equal to the highest of the three current transformer outputcurrents I I or l@ at any instant of time because of the seriesconnection of bridge rectifiers DB1, DB2, and DB3. This connection ofbridge rectifiers to provide current auctioneering is described by .l.C. Engel.

pm of the circuit which includes the three bridge networks DBl throughDB3 eliminates the necessity for providing a fault current in the linesLl through L3. That current may be simulated by the currents flowing outof terminal K and into terminal .I of the fault simulators F. Thisletter current may be calibrated to simu late current II, which current,as was previously described, is related to the amount of overloadcurrent flowing in any of the lines tobe protected. The current flowingbetween terminals K and J- of the fault simulator F is supplied to thesolid state trip circuit 13' whereupon it causes that circuit to reactaccording to the magnitude of the current. Relatively high faultcurrents may be simulated by displacing the wiper of the switch S of thefault sensor F to the SD position where a relatively large electricalcurrent is provided to the sensor 13 for a predetermined time, dependingupon the timprovided by displacing the pole of switch S to the LDnormally cause delayed opening of circuit breaker position, where theremoval of current in the solid state trip circuit 13' between theterminals K and .l is not automatic. The currents provided to the tripcircuit 13' in this case may be similar to the kinds of current whichcontacts because of the relative low level thereof.

A method of using the fault sensor F includes connecting the outputterminals K, J thereof to the input terminals K, J of the circuitbreaker to be tested and then energizing the fault sensor by connectingthe primary T of the transformer TA to a suitable source of power. Then,depending upon the setting of the switch, current may flow into the tripcircuit at a relatively high magnitude for-a short period of time or ata relatively low magnitude indefinitely.

It is to be understood that the circuit breaker system 10 of FIG. 4 isonly exemplary of the workings of the invention taught herein and anysimilar circuit breaker system including a single phase system may beutilized. It is also to be understood that the internal elements andconnections of the solid trip circuit 13 are relatively unimportant,provided they can be adjusted to react to the flow of current providedby the fault sensor F to cause a tripping of the circuit breaker CB2.

The teachings of this invention have many advantages. One of theadvantages lie in the fact that a circuit breaker trip system such asshown in FIG. 4 may be tested without the necessity of disconnecting andreconnecting large portions of the circuit breaker system associatedtherewith. Another advantage lies in the fact that the apparatus andmanner of testing the circuit breaker trip system provides for increasedsafety. Another advantage lies in the fact that the apparatus forsimulating a fault signal, such as F shown in FIGS; 2 and 3, isrelatively inexpensive, lightweight and portable. Another advantage liesin the fact that the fault sensor may be calibrated or adjusted toprovide currents over a wide range of current values. Another advantagelies in the fact that relatively high level simulating currents'may beprovided by the apparatus F shown in FIG. 2 for a relatively shortperiod of time, therefore simulating a short circuit on the line to beprotected without stressing the elements of the solid state trip circuitfor long periods of high currents and high voltage.

- What we claim as our invention is:

l. A fault simulator for a trip circuit of a circuit interrupter, wheresaid trip circuit is electrically connected to a sensor and where saidsensor monitors the electrical current flowing in an electricalconductor protected by said circuit interrupter to thereby provide asignal to said trip circuit to thereby cause said trip circuit toactuate said circuit interrupter to act to protect said conductor fromthe effects of said current when said current attains a predeterminedvalue and after a predetermined period of time which time is related tothe amount of electrical current monitored by said sensors, comprising:

A. first means additional to said sensor actuable for 4 providing afirst simulating signal to said trip circuit at anydesired time andregardless of the value of current flowing in said conductor, saidlatter signal simulating said signal from said sensor when said value ofcurrent flowing in said conductor is substantially larger than saidpredetermined value;

B. second means additional to said sensor actuable for providing asecond simulating signal to said trip circuit at any desired time andregardless of the value of current flowing in said conductor, saidlatter signal simulating said signal from said sensor when said value ofcurrent flowing in said conductor is larger but not substantially largerthan said predetermined value; and

C. third means for interconnecting said first and said second means'withsaid trip circuit.

2. The combination as claimed in claim 1, comprising a fourth means forselectively choosing which of said first simulating or said secondsimulating means is provided to said trip circuit.

3. The combination as claimed in claim 1 wherein said trip circuitcomprises a solid state trip circuit.

4. The combination as claimed in claim 1 wherein said circuitinterrupter comprises a circuit breaker with separable main contacts,said separable main contacts being actuated'to the open state to protectsaid conductor.

5. The combination as claimed in claim 1 wherein said first simulatingsignal and said second simulating signal are electrical signals.

6. The combination as claimed in claim 1 wherein said first meanscomprises means for removing said first simulating signal from said tripcircuit a predetermined time after the application thereof which time isrelated to the capability of said trip circuit to be exposed to saidfirst simulating signal without being damaged to the state ofinoperability for the intended purpose thereof.

7. The combination as claimed in claim 1 wherein said first meanscomprises:

A. a source of electrical current;

B. first resistant means;

C. first capacitive means, said first'resistive means and saidcapacitive means being interconnected electrically in circuitrelationship to form a charging network for said capacitive means with aportion of said electrical current from said source of said electricalcurrent to a predetermined voltage value during a predetermined periodof time;

D. voltage sensitive relay means having movable contacts, said relaymeans being connected in circuit relationship with said capacitive meansand energizable by the voltage level across said capacitive means toopen and close said relay means movable contacts; and

E. electrical interconnecting means comprising said movable contacts ofsaid relay means and connected between said source of electrical currentand said trip circuit to supply said first simulating signal in the formof the remaining portion of electrical current from said source ofcurrent to said trip circuit when said simulator is actuated for thatpurpose, said relay contacts opening and thus presenting furtherapplication of said simulating signals to said trip circuit when saidcapacitive means has been charged to said predetermined voltage value.

8. The combination as claimedin claim 1 wherein said first meanscomprises:

A. a source of electrical current; and

B. a temperature sensitive first resistive means which has thecharacteristic of increasing in resistance value as the temperaturetherein increases due to the continued flow of electrical currenttherethrough, said first resistive means interconnecting said source ofcurrent and said trip circuit to supply said first simulating signal inthe form of electrical current from said source of current when saidsimulator is actuated for that purpose, said current being limited apredetermined time thereafter to thereby substantially limit the flow ofcurrent therethrough in response to the rise of temperature therein toessentially prevent simulating signal from further substantiallyenergizing said trip circuit.

9. Circuit breaker apparatus, comprising:

A. a circuit'breaker having separable main contacts operable to open andclose on an electrical conductor to be protected thereby, opening meansoperable for actuating said contacts to the open position;

B. a trip circuit interconnected with said opening means for causingoperation thereof;

C. sensor means interconnected with said trip circuit and disposed tomonitor the electrical current in said electrical conductor, said sensormeans providing a signal of said trip circuit when said current in saidconductor attains a predetermined value, said trip circuit causing theopening of said main contacts after a predetermined period of time whichtime is related to the amount of said electrical current in saidconductor as monitored by said sensor; v

D. a fault simulator, comprising:

1. first means additional to said sensor means actuable for providing afirst simulating signal to said trip circuit at any desired time andregardless of the value of current flowing through said conductor, saidlatter signal simulating said signal from said sensor when said value ofcurrent flowing in said conductor is substantially larger than saidpredetermined value; 2. second means additional to said sensor meansactuable for providing a second simulating signal to said trip circuitat any desired time and regardless of the value of current flowing insaid conductor, said latter signal simulating said signal from saidsensor when said value of current flowing in said conductor is largerbut not substantially larger than said predetermined value; and 3. thirdmeans for interconnecting said first and said second means with saidtrip circuits. 10. The combination as claimed in claim 9 comprising afourth means for selectively choosing which of either said firstsimulating means or said second simulating means is provided to saidtrip circuit. 11. The combination as'claimed in claim 9wherein said tripcircuit comprises a solid state trip circuit.

12. The combination as claimed in claim 9 wherein said circuitinterrupter comprises a circuit breaker with separable maincontacts,said separable main contacts being actuated to the open condition toprotect said conductor.

1 .13. The combination as claimed in claim 9 wherein I said'firstsimulating signal and said second simulating signal are electricalsignals. a

14. The combination as claimed in claim 9 wherein.

time after the application thereof which time is related to thecapability of said trip circuit to be exposed to. said first simulatingsignal without being damaged to the state of inoperability for theintended purpose thereof.

15. The combination as claimed in claim 9, wherein said first meanscomprises:

A. a source of electrical current; and B. a temperature sensitive firstresistive means which has the characteristic of increasing in resistancevalue as the temperature therein increases due to the continued flow ofelectrical current therethrough, said first resistive meansinterconnecting said source of current and said trip circuit to supplysaid first simulating signal in the form of electrical current from saidsource of current when said simulator is actuated for that purpose, saidcurrent being limited a predetermined time thereafter to therebysubstantially limit the flow of current therethrough in response to therise of temperature therein to essentially prevent said simulatingsignal from further substantially energizing said trip circuit. 16. Thecombination as claimed in claim 9 wherein said first means comprises:

A. a source of direct electrical current; B. first resistive means; C.first capacitive means, said first resistive means and said capacitivemeans being interconnected in electrical circuit relationships to form acharging network for charging said capacitive means with a portion ofsaid electrical current from said source of electrical current to apredetermined voltage value during a predetermined period of time;

D. voltage sensitive relay means having movable relay contacts, saidrelay means having movable relay contacts, said relay means beingconnected in circuit relationship with said capacitive means, andenergized by the voltage level across said capacitive means to open andclose said movable relay said predetermined voltage value. i=

1. A fault simulator for a trip circuit of a circuit interrupter, wheresaid trip circuit is electrically connected to a sensor and where saidsensor monitors the electrical current flowing in an electricalconductor protected by said circuit interrupter to thereby provide asignal to said trip circuit to thereby cause said trip circuit toactuate said circuit interrupter to act to protect said conductor fromthe effects of said current when said current attains a predeterminedvalue and after a predetermined period of time which time is related tothe amount of electrical current monitored by said sensors, comprising:A. first means additional to said sensor actuable for providing a firstsimulating signal to said trip circuit at any desired time andregardless of the value of current flowing in said conductor, saidlatter signal simulating said signal from said sensor when said value ofcurrent flowing in said conductor is substantially larger than saidpredetermined value; B. second means additional to said sensor actuablefor providing a second simulating signal to said trip circuit at anydesired time and regardless of the value of current flowing in saidconductor, said latter signal simulating said signal from said sensorwhen said value of current flowing in said conductor is larger but notsubstantially larger than said predetermined value; and C. third meansfor interconnecting said first and said second means with said tripcircuit.
 2. The combination as claimed in claim 1, comprising a fourthmeans for selectively choosing which of said first simulating or saidsecond simulating means is provided to said trip circuit.
 2. secondmeans additional to said sensor means actuable for providing a secondsimulating signal to said trip circuit at any desired time andregardless of the value of current flowing in said conductor, saidlatter signal simulating said signal from said sensor when said value ofcurrent flowing in said conductor is larger but not substantially largerthan said predeteRmined value; and
 3. The combination as claimed inclaim 1 wherein said trip circuit comprises a solid state trip circuit.3. third means for interconnecting said first and said second means withsaid trip circuits.
 4. The combination as claimed in claim 1 whereinsaid circuit interrupter comprises a circuit breaker with separable maincontacts, said separable main contacts being actuated to the open stateto protect said conductor.
 5. The combination as claimed in claim 1wherein said first simulating signal and said second simulating signalare electrical signals.
 6. The combination as claimed in claim 1 whereinsaid first means comprises means for removing said first simulatingsignal from said trip circuit a predetermined time after the applicationthereof which time is related to the capability of said trip circuit tobe exposed to said first simulating signal without being damaged to thestate of inoperability for the intended purpose thereof.
 7. Thecombination as claimed in claim 1 wherein said first means comprises: A.a source of electrical current; B. first resistant means; C. firstcapacitive means, said first resistive means and said capacitive meansbeing interconnected electrically in circuit relationship to form acharging network for said capacitive means with a portion of saidelectrical current from said source of said electrical current to apredetermined voltage value during a predetermined period of time; D.voltage sensitive relay means having movable contacts, said relay meansbeing connected in circuit relationship with said capacitive means andenergizable by the voltage level across said capacitive means to openand close said relay means movable contacts; and E. electricalinterconnecting means comprising said movable contacts of said relaymeans and connected between said source of electrical current and saidtrip circuit to supply said first simulating signal in the form of theremaining portion of electrical current from said source of current tosaid trip circuit when said simulator is actuated for that purpose, saidrelay contacts opening and thus presenting further application of saidsimulating signals to said trip circuit when said capacitive means hasbeen charged to said predetermined voltage value.
 8. The combination asclaimed in claim 1 wherein said first means comprises: A. a source ofelectrical current; and B. a temperature sensitive first resistive meanswhich has the characteristic of increasing in resistance value as thetemperature therein increases due to the continued flow of electricalcurrent therethrough, said first resistive means interconnecting saidsource of current and said trip circuit to supply said first simulatingsignal in the form of electrical current from said source of currentwhen said simulator is actuated for that purpose, said current beinglimited a predetermined time thereafter to thereby substantially limitthe flow of current therethrough in response to the rise of temperaturetherein to essentially prevent simulating signal from furthersubstantially energizing said trip circuit.
 9. Circuit breakerapparatus, comprising: A. a circuit breaker having separable maincontacts operable to open and close on an electrical conductor to beprotected thereby, opening means operable for actuating said contacts tothe open position; B. a trip circuit interconnected with said openingmeans for causing operation thereof; C. sensor means interconnected withsaid trip circuit and disposed to monitor the electrical current in saidelectrical conductor, said sensor means providing a signal of said tripcircuit when said current in said conductor attains a predeterminedvalue, said trip circuit causing the opening of said main contacts aftera predetermined period of time which time is related to the amount ofsaid electrical current in said conductor as monitored by said sensor;D. a fault simulator, comprising:
 10. The combination as claimed inclaim 9 comprising a fourth means for selectively choosing which ofeither said first simulating means or said second simulating means isprovided to said trip circuit.
 11. The combination as claimed in claim 9wherein said trip circuit comprises a solid state trip circuit.
 12. Thecombination as claimed in claim 9 wherein said circuit interruptercomprises a circuit breaker with separable main contacts, said separablemain contacts being actuated to the open condition to protect saidconductor.
 13. The combination as claimed in claim 9 wherein said firstsimulating signal and said second simulating signal are electricalsignals.
 14. The combination as claimed in claim 9 wherein said firstmeans comprises means for removing said first simulating signal fromsaid trip circuit a predetermined time after the application thereofwhich time is related to the capability of said trip circuit to beexposed to said first simulating signal without being damaged to thestate of inoperability for the intended purpose thereof.
 15. Thecombination as claimed in claim 9, wherein said first means comprises:A. a source of electrical current; and B. a temperature sensitive firstresistive means which has the characteristic of increasing in resistancevalue as the temperature therein increases due to the continued flow ofelectrical current therethrough, said first resistive meansinterconnecting said source of current and said trip circuit to supplysaid first simulating signal in the form of electrical current from saidsource of current when said simulator is actuated for that purpose, saidcurrent being limited a predetermined time thereafter to therebysubstantially limit the flow of current therethrough in response to therise of temperature therein to essentially prevent said simulatingsignal from further substantially energizing said trip circuit.
 16. Thecombination as claimed in claim 9 wherein said first means comprises: A.a source of direct electrical current; B. first resistive means; C.first capacitive means, said first resistive means and said capacitivemeans being interconnected in electrical circuit relationships to form acharging network for charging said capacitive means with a portion ofsaid electrical current from said source of electrical current to apredetermined voltage value during a predetermined period of time; D.voltage sensitive relay means having movable relay contacts, said relaymeans having movable relay contacts, said relay means being connected incircuit relationship with said capacitive means and energized by thevoltage level across said capacitive means to open and close saidmovable relay contacts; and E. electrical interconnecting meanscomprising said movable relay contacts interconnected between saidsource of electrical current and said trip circuit to supply said firstsimulating signal in the form of the remaining portion of electricalcurrent from said source of current to said trip circuit when saidsimulator is actuated for that purpose, said relay contacts opening andthus preventing further application of said simulating signal to saidtrip circuit when said capacitive means has been charged to saidpredetermined voltage value.